Ultra Accelerator Link Consortium Incorporates; Announces Membership Opportunity

Key highlights:

The UALink Consortium has officially incorporated and is now extending an invitation for companies to join the Consortium as Contributor members. Membership information can be found on the UALink website.
The UALink 1.0 specification will be made available to Contributor members this year and available for general review in Q1 2025.

Ultra Accelerator Link Consortium Incorporates; Announces Membership Opportunity

Nolan Morgan
+1 971-271-2657
press@members.ualinkconsortium.org

Ultra Accelerator Link™ (UALink™) Consortium, led by Board Members from AMD, Amazon Web Services (AWS), Astera Labs, Cisco, Google, Hewlett Packard Enterprise (HPE), Intel, Meta and Microsoft, have announced the incorporation of the Consortium and are extending an invitation for membership to the community. The UALink Promoter Group was founded in May 2024 to define a high-speed, low-latency interconnect for scale-up communications between accelerators and switches in AI pods & clusters.

Join the UALink Consortium

Consortium Board companies represent a wide range of industry expertise including Cloud Service Providers, System OEMs, IP Providers, Silicon Providers and Software Companies. Work is currently underway to develop additional usage models for data center AI connectivity. The Consortium invites interested companies and institutions to join as Contributor members who will help contribute to the Consortium and shape future UALink specifications. For Membership information and to join, visit www.UALinkConsortium.org or contact admin@ualinkconsortium.org.

“The UALink standard defines high-speed and low latency communication for scale-up AI systems in data centers,” said Willie Nelson, President, UALink Consortium. “Interested companies are encouraged to join as Contributor members to support our mission: establishing an open and high-performance accelerator interconnect for AI workloads.”

UALink 1.0 Specification

The UALink 1.0 specification will enable up to 200Gbps per lane scale-up connection for up to 1024 accelerators within an AI pod. The specification will be available to Contributor members this year and available for general review in the first quarter of 2025.

“The release of the UALink 1.0 specification in Q1 2025 represents an important milestone as it will establish an open industry standard enabling AI accelerators and switches to communicate more effectively, expand memory access to meet large AI model requirements and demonstrate the benefits of industry collaboration,” said Kurtis Bowman, Chairperson, UALink Consortium.

About Ultra Accelerator Link Consortium

Ultra Accelerator Link (UALink) is a high-speed, scale-up accelerator interconnect technology that advances next-generation AI cluster performance. AMD, Astera Labs, AWS, Cisco, Google, HPE, Intel, Meta and Microsoft formed an open industry standard body, Ultra Accelerator Link Consortium, to develop technical specifications that facilitate breakthrough performance for emerging usage models while supporting an open ecosystem for data center accelerators.